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A brief description of the 2 basica discrete emitter that utilizessub-assemblies, Opticala high speed, high efficiency,SubAssembly (OSA) and
Transparent Substrate, doubleElectrical SubAssembly (ESA), isheterojunction, Aluminumon page 2.
Gallium Arsenide (TS AlGaAs)LED technology with an integralApplications Information
lens in a clear molded package.The Applications EngineeringThe transmitter lens is optimizedgroup, in the Hewlett-Packardfor speed, efficiency, and
Communications Semiconductordistance at an emission wavelengthSolutions Division, is availableof 870 nm.
to assist you with the technicalunderstanding associated withThe receiver utilizes a discretethis IR transceiver module. Yousilicon PIN photodiode with ancan contact them through yourintegral lens in a molded packagelocal Hewlett-Packard salesand contains a dye to absorbrepresentative for additionalvisible light. The receiver lensdetails.
magnifies the effective area of thePIN diode to enhance sensitivity.Optical SubAssembly
The power supply for the PINThe Optical SubAssemblies (OSA)and preamplifier are filtered toincludes a Transmitter and aattenuate noise from externalReceiver. The transmitter has
sources.
I/O Pins Configuration Table
PinDescriptionSymbol1LED AnodeLEDA2Transmitter Data InputTXD3Receiver Data Output – Channel BRXD-B4Receiver Data Output – Channel A
RXD-A5Threshold Capacitor
CX36GroundGND7Supply VoltageVCC8Averaging CapacitorCX49Ground (Analog)GND10
PIN Bypass Cap
CX1
2
Electrical SubAssembly
The Electrical SubAssembly
(ESA) consists of a printed circuitboard on which a bipolar siliconIntegrated Circuit (IC) andvarious surface-mount passivecircuit elements are attached. TheIC contains an LED driver and areceiver providing two outputsignals, RXD-A and RXD-B.
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VCCCX7R21HSDL-2100CX2TXDTXDR12LEDAIEEIPINBIASVCCCX6CX110CX1GND6CX48CX4CX35CX3R3CX59GNDADAPTIVETHRESHOLD& SQUELCHRXD-A4VREFRXD-B37VCCFigure 1. HSDL-2100 Block Diagram and Application Circuit.
Recommended Application Circuit Components
Component
R1R2R3[1]CX1[2]CX2CX3[4]CX4CX5[2]CX6CX7[3]
560 Ω, ±5%, 0.125 Watt4.7 Ω, ±5%, 0.5 Watt10 Ω, ±5%, 0.125 Watt0.47 µF, ±10%, X7R Ceramic220 pF, ±10%, X7R Ceramic4700 pF, ±10%, X7R Ceramic0.010 µF, ±10%, X7R Ceramic
0.47 µF, ±20%, X7R Ceramic ≤5 mm lead length
6.8 µF Tantalum. Larger value recommended for noisy supplies or environments.0.47 µF, ±20%, X7R Ceramic.
Recommended Value
Notes:
1.In environments with noisy power supplies, supply rejection can be enhanced by including R3 as shown in application circuit.2.CX1 and CX5 must be placed within 0.7 cm of the HSDL-2100 to obtain optimum noise immunity.3.Only necessary in applications where transmitter switching causes more than a 50 mV ripple on VCC.
4.CX3 may be replaced with 1000 pF for MIR, FIR application performance. For FIR application used 4700 pF as shown in applicationcircuit.
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Package Outline with Dimension and Recommended PCBoard Pad Layout
(Option #001 — Integrated EMI shield with Guide Pins.)
1.051.007.5 ± 0.208.8 ± 0.2013.00 ± 0.206.30 ± 0.10TYP. R 0.1510.59TYP. 0.551.143 BSC100.80 ± 0.155.50± 0.159.60 ± 0.302.80 ± 0.305.30 ± 0.20GUIDE PINS3.20 ± 0.30+ 0.151.00 03° ± 3°1.50 ± 0.300.80 ± 0.20SHIELD GROUND PIN0.97 ± 0.10(10X) 0.700.51 ± 0.15PIN11.05 ± 0.101.31 ± 0.102.31 ± 0.101.143BSC5.05(10X) 2.602.924.30AR 0.402.40BA1.255.8411.86 ± 0.10SHIELDSOLDER PADNOTES:1. RECOMMENDED SOLDER STENCIL TO BE 5 TO 6 MILS THICK.2. LETTER 'A' INDICATES LOCATION OF THROUGH HOLE FOR SHIELD GUIDE PIN.2. LETTER 'B' INDICATES LOCATION OF SHIELD SOLDERED GROUNDING PAD.Figure 2.
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Package Outline with Dimension and Recommended PCBoard Pad Layout
(Option #002 — Integrated EMI shield without Guide Pins.)
1.051.007.5 ± 0.208.8 ± 0.2013.00 ± 0.202.80 ± 0.305.30 ± 0.20TYP. R 0.1511TYP. 0.551.143 BSC100.80 ± 0.155.50± 0.159.60 ± 0.303.20 ± 0.30+ 0.151.00 03° ± 3°1.50 ± 0.300.80 ± 0.20SHIELD GROUND PIN0.97 ± 0.10(10X) 0.700.51 ± 0.15PIN11.05 ± 0.101.31 ± 0.102.31 ± 0.101.143BSC5.05(10X) 2.602.922.40ASHIELD SOLDER PAD1.25NOTES:1. RECOMMENDED SOLDER STENCIL TO BE 5 TO 6 MILS THICK.2. LETTER 'A' INDICATES LOCATION OF SHIELD SOLDERED GROUNDING PAD.Figure 3.
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Truth Table
Inputs
TXDVIHVILVILVIL
EIXEIH[1]EIH[2]EIL
IE (LED)High (On)Low (Off)Low (Off)Low (Off)
OutputsRXD-ANVLow[3]NVHigh
RXD-BNVNVLow[3]High
X = Don’t care; NV = Not ValidNotes:
1. In-Band EI ≤ 115.2 Kb/s.2. In-Band EI ≥ 1.15 Mb/s.
3. Logic Low is a pulsed response. The condition is maintained for a duration dependent on pattern and strength of the incident intensity.
Absolute Maximum Ratings[4]
Parameter
Storage TemperatureOperating TemperatureAverage LED CurrentAverage LED Current
Repetitive Pulsed LED CurrentPeak LED CurrentLED Anode VoltageSupply VoltageTransmitter DataInput Current
Receiver Data Output Voltage
SymbolTSTAILED(DC1)ILED(DC2)ILED(RP)ILED(PK)VLEDAVCCITXD(DC)VRXD-AVRXD-B
-0.50-12-0.5-0.5350[5]Min.-200
Max.8570100165660[5]7507712VCC + 0.5VCC + 0.5
Units°C°CmAmAmAmAVVmAVV
≤90 ms Pulse Width,≤25% Duty Cycle≤90 ms Pulse Width,≤25% Duty Cycle≤2 ms Pulse Width,≤10% Duty CycleConditions
Notes:
4. For implementations where case to ambient thermal resistance ≤50°C/W.
5. See the thermal derating curves on pages 10 and 11 for maximum operating conditions in order to maintain T junction <125°C.Note: Performance is guaranteed in the operating temperature range of 0°C to 70°C. The information provided outside of this range isfor reference only.
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Recommended Operating Conditions
ParameterOperating TemperatureSupply VoltageLogic High TransmitterInput Voltage
Logic Low TransmitterInput VoltageLogic High ReceiverInput IrradianceLogic Low ReceiverInput IrradianceLED (Logic High)
Current Pulse AmplitudeReceiver Setup TimeReceiver Signal RateRXD-A
Receiver Signal RateRXD-BAmbient Light
2.40.58
SymbolTAVCCVIH(TXD)VIL(TXD)EIHEILILEDA
400Min.04.754.2500.00360.0090
Max.705.255.250.35005000.356011154
Units°CVVVmW/cm2mW/cm2µW/cm2mAmsKb/sMb/s
See IrDA Serial Infrared PhysicalLayer Link Specification,
Appendix A for ambient levels.
[2][2]
Conditions
For in-band signals ≤116 kb/s[1]For in-band signals ≤1.0 Mb/s[1]For in-band signals[1]
[3]
For full sensitivity aftertransmitting
Notes:
1.An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 nm ≤ λp ≤900 nm, and the pulse
characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification.
2.With R1, CX2 Input network and where tr (VI) and tf (VI) ≤5 ns. See Application Circuit for component values. The driver gate forthis input should be able to source and sink ±6 mA(DC) and ±50 mA(pk). TXD refers to the node on the driver gate side of R1, CX2on application circuit.
3.See the thermal derating curves on pages X and Y for maximum operating conditions in order to maintain T junction < 125°C.
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Electrical and Optical Specifications
Specifications hold over the Recommended Operating Conditions unless otherwise noted. Test Conditionsrepresent worst case values for the parameters under test. Unspecified test conditions can be anywhere intheir operating range. All typical values are at 25°C and 5 V unless otherwise noted.
Parameter
Receiver DataOutput Voltage
Logic Low
SymbolVOL(RXD-A)[2]
Min.
Typ.
Max.0.5
UnitV
ConditionsIO(RXD-A)=1.0 mA. Forin-band EI ≥3.6 µW/cm2,φ1/2 ≤15°
IO(RXD-B)=1.0 mA. Forin-band EI ≥9.0 µW/cm2,φ1/2 ≤15°
IOH(RXD-A)=-20 µA. Forin-band EI ≤0.3 µW/cm2IOH(RXD-B)=-20 µA. Forin-band EI ≤0.3 µW/cm2
Logic Low
VOL(RXD-B)[2]
0.5V
Logic HighLogic High
VOH(RXD-A) VCC - 0.6VOH(RXD-B) VCC - 1.2
30
0.1
EIH
100
177
500
VVdegreescm2mW/SR
Viewing Angle2φ1/2
Effective Detector AreaTransmitterRadiantIntensity
Logic HighIntensityPeak
WavelengthSpectral LineHalf Width
TransmitterData InputCurrentLED Anode OnState VoltageLED Anode OffState LeakageSupply Current
IdleActiveReceiver
Receiver PeakSensitivityWavelength
Logic Low
VIH(TXD)=4.25 V[1],ILEDA=400 mA,TA=25°C, θ1/2 ≤15°
λp∆λ1/2
30-2
87535
602
nmnmdegreesµA
Gnd ≤VIL(TXD)≤0.3 V[1]
VIH(TXD)=4.25 V[1]ILEDA=400 mA, 25°CVIH(TXD)=4.25 V[1]VLEDA=VCC=5.25 V,VIL(TXD)=0.3 V[1]VCC=5.25 V,
VI(TXD)=VIL, EI=0VCC=5.25 V,VI(TXD)=VIL
EI ≤500 mW/cm2
Viewing Angle2θ1/2
IL(TXD)
Logic High
IH(TXD)VON(LEDA)ILK (LEDA)ICC1ICC2
5.46.62.7825034
5.122
mAVµAmAmA
λp880nm
Notes:
1.With R1, CX2 input network. See Application Circuit for component values. TXD refers to driver gate of R1, CX2 on application circuit.2.Logic Low is a pulsed response. The condition is maintained for a duration dependent on pattern and strength of the incident intensity.
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Switching Specifications
Specifications hold over the Recommended Operating Conditions unless otherwise noted. Test Conditionsrepresent worst case values for the parameters under test. Unspecified test conditions can be anywhere intheir operating range. All typical values are at 25°C and 5 V unless otherwise noted.
Parameter
Transmitter RadiantIntensity Pulse Width
Symboltpw (IE)
Min.1.5115
Transmitter RadiantIntensity Rise and FallTimes
RXD-A Pulse WidthRXD-B Pulse WidthRXD-B Pulse Width (ASK)Receiver Latency Time
tL(RXD-B)tL(RXD-A)tr(IE),tf(IE)tpw (RXD-A)tpw (RXD-B)
1750.7
10.5Typ.1.6125
Max.1.813540
Unitµsnsns
Conditions
tpw (TXD)=1.6 µs at 115.2 Kpulses/second
tpw (TXD)=125 ns at 2.0 Mpulses/second
tpw (TXD)=125 ns at 2.0 Mpulses/second
[1] φ ≤ 1/2[2] φ ≤1/2
7.51751.31
µsnsµsms
15°15°
[3] 500 kHz/50% duty cycle
carrier ASK
[1][2]
Notes:
1.For In-Band signals ≤115.2 Kb/s where 3.6 µW/cm2 ≤EIL ≤500 mW/cm2.
2.For In-Band signals, 125 ns PW, 4 Mb/s, 4 PPM where 9.0 µW/cm2 ≤EI ≤500 mW/cm2.
3.Pulse width specified is the pulse width of the second 500 kHz carrier pulse received in a data bit. The first 500 kHz carrier pulse mayexceed 2 µs in width, which will not affect correct demodulation of the data stream. An ASK and DASK system using the HSDL-2100 hasbeen shown to correctly receive all data bits for 9 µW/cm2 Figure 4 in page 10 is a straightline representation of a nominaltemperature profile for a con-vective IR reflow solder process.The temperature profile is dividedinto four process zones with four∆T/∆time temperature changerates. The ∆T/∆time temperaturechange rates are detailed in Tablebelow Figure 4. The temperaturesare measured at the componentto printed-circuit (pc) boardconnections. In process zone P1, the pc boardand SMT HSDL-2100 castellationI/O pins joints are heated to atemperature of 125°C to activatethe flux in the solder paste. Thetemperature ramp up rate, R1, islimited to 3° per second to allowfor even heating of both the pcboard and the SMT HSDL-2100castellation I/O pins joints. Process zone P2 should be ofsufficient time duration to drythe solder paste. The temperatureis raised to a level just belowthe liquidus point of the solder,usually 170°C (338°F). Process zone P3 is the solderreflow zone. In zone P3, thetemperature is quickly raisedabove the liquidus point of solderto 230°C (446°F) for optimumresults. The dwell time above theliquidus point of solder should bebetween 15 and 90 seconds. Itusually takes about 15 seconds toassure proper coalescing of thesolder balls into liquid solderand the formation of good solderconnections. Beyond a dwell timeof 90 seconds, the intermetallicgrowth within the solder connec-tions becomes excessive, result-ing in the formation of weak and unreliable connections. Thetemperature is then rapidlyreduced to a point below the solidus temperature of the solder,usually 170°C (338°F), to allowthe solder within the connectionsto freeze solid. Process zone P4 is the cooldown after solder freeze. Thecool down rate, R5, from theliquidus point of the solder to25°C (77°F) should not exceed-3°C (-5.4°F) per second maxi-mum. This limitation is necessaryto allow the pc board and SMTHSDL-2100 castellation I/O pinsjoints to change dimensionsevenly, putting minimal stresseson the SMT HSDL-2100transceiver packages. 元器件交易网www.cecb2b.com 10 The Temperature Profile for a Nominal Convective IR Reflow Solder ProcessSee the Table below for ∆ Temperature (RX) Values. 230T – TEMPERATURE – (°C)R3R4200183170150125100R1R290 sec. MAX.ABOVE183°CR550250153045607590105120135150165180195210P3SOLDERREFLOWP4COOL DOWNt-TIME (SECONDS)P1HEAT UPP2SOLDER PASTE DRYFigure 4. TABLE FOR CONVECTIVE PROCESS ZONES, SEE FIGURE 4.PROCESS ZONEHEAT UPSOLDER PASTE DRYSOLDER REFLOWCOOL DOWNSYMBOLP1, R1P2, R2P3, R3R4P4, R5∆T25°C TO 125°C125°C TO 170°C170°C TO 230°C (235°C MAX.)230°C TO 170°C170°C TO 25°C∆T/∆TIME3°C/s MAX.0.5°C/s MAX.4°C/s TYP.-4°C/s TYP.-3°C/s MAX.Thermal Derating Curves These 2 graphs show maximum allowable LED drive current as a function of ambient temperature and thedesigner’s PCB-to-ambient thermal resistance. MAXIMUM AMBIENT TEMPERATURE (°C)100MAXIMUM DRIVE CURRENT (A)0.80.70.60.50.40.30.20.10020406080100120806040200-20THbd–amb = 50 C/WTHbd–amb = 100 C/WTHbd–amb = 150 C/WTHbd–amb = 200 C/WTHbd–amb = 250 C/WTHbd–amb = 300 C/W00.20.40.60.8LED DRIVE CURRENT (A)CASE TEMPERATURE (°C)JUNCTION TO CASE MEASUREMENTS FOR HSDL-2100IF (A)0.40.450.50.550.60.650.70.75MAX. CASE TEMPERATURE (°C)101.398.495.392.188.785.281.677.9元器件交易网www.cecb2b.com 11 Tape and Reel Dimensions 1.50 ±0.1016.00 ± 0.101.75 ± 0.104.00 ± 0.102.00 ± 0.1011.50 ± 0.1024.00 ± 0.20LENS FACING DIRECTION4.88 ± 0.104° MAX.8° MAX.7.05 ± 0.108.56 ± 0.1013.16 ± 0.10Figure 5. Reel for 24 mm Tape REEL FOR 24 mm TAPE30.4 MAX.MEASUREDAT HUB24.4+ 2.00 0MEASUREDAT HUB1.5 MIN.330 MAX.20.2 MIN.100.0 ± 0.50HUB DIAMETER(SCROLL START)1.30 ± 0.20DIMENSIONS IN MILLIMETERS27.40MEASURED AT23.90OUTER EDGEFigure 6. 元器件交易网www.cecb2b.com Appendix A. Test Methods A.1. Background Light andElectromagnetic Field There are four ambient interference conditions in whichthe receiver is to operate correctly.The conditions are to be appliedseparately: 1. Electromagnetic field: 3 V/m maximum (refer to IEC801-3, severity level 3 fordetails). 2. Sunlight: 10 kilolux maximumat the optical port. This is simulated with an IR source having a peak wavelengthwithin the range 850 nm to 900 nm and a spectral width lessthan 50 nm biased to provide490 µW/cm2 (with no modulation)at the optical port. The lightsource faces the optical port.This simulates sunlight within theIrDA spectral range. The effectof longer wavelength radiation is covered by the incandescentcondition. 3. Incandescent Lighting: 1000lux maximum. This is produced with generalservice, tungsten-filament, gas-filled, inside-frosted lamps in the60 Watt to 150 Watt range togenerate 1000 lux over thehorizontal surface on which theequipment under test rests. Thelight sources are above the testarea. The source is expected tohave a filament temperature inthe 2700 to 3050 degrees Kelvinrange and a spectral peak in the850 nm to 1050 nm range.4. Fluorescent Lighting: 1000 luxmaximum. This is simulated with an IR source having a peak wavelengthwithin the range 850 nm to900 nm and a spectral widthof less than 50 nm biased andmodulated to provide an opticalsquare wave signal (0 µW/cm2minimum and 0.3 µW/cm2 peakamplitude with 10% to 90% rise 12 and fall times less than or equalto 100 ns) over the horizontalsurface on which the equipmentunder test rests. The light sourcesare above the test area. The frequency of the optical signal isswept over the frequency rangefrom 20 kHz to 200 kHz. Due tothe variety of fluorescent lampsand the range of IR emissions,this condition is not expected tocover all circumstances. It willprovide a common floor for IrDAoperation. All HP IR transceivers areclassified as IEC 825-1Accessible Emission Limit(AEL) Class 1. AEL Class 1LED devices are consideredeye safe. See Hewlett-PackardApplication Note 1094 formore information. 元器件交易网www.cecb2b.com 13 Appendix B. SMT Assembly Methods 1.0 Solder Pad, Mask and Metal Solder Stencil Adapter METAL STENCILFOR SOLDER PASTEPRINTINGSTENCILAPERTURELAND PATTERNSOLDERMASKPCBFigure 1.0. Stencil and PCB. 1.1. Recommended Land Pattern for HSDL-2100 Dim.abc (pitch) defg mm2.60.71.142.41.254.225.05 Inches0.10.030.050.090.050.170.2 SHIELD SOLDER PADeRx LENSTx LENSdgbYcfatheta10x PADFigure 2.0. Top View of Land Pattern. 元器件交易网www.cecb2b.com 14 1.2. Adjacent Land Keepout and Solder Mask Areas Dim.ghkj mmmin. 0.1513.47.22.1 Inchesmin. 0.0060.530.280.08 • “g” is the minimum solder resiststrip width required to avoidsolder bridging adjacent pads.Note: Wet/Liquid Photo-Imageable solder resist/mask isrecommended. • Adjacent land keep-out is themaximum space occupied bythe unit relative to the landpattern. There should be noother SMD components withinthis area. hRx LENSTx LENSDIM.ghkjmmMIN. 0.1513.47.22.1INCHESMIN. 0.0060.530.280.08LANDgSOLDERMASKk• ADJACENT LAND KEEP-OUT IS THEMAXIMUM SPACE OCCUPIED BY THEUNIT RELATIVE TO THE LAND PATTERN.THERE SHOULD BE NO OTHER SMDCOMPONENTS WITHIN THIS AREA.• \"g\" IS THE MINIMUM SOLDER RESISTSTRIP WIDTH REQUIRED TO AVOIDSOLDER BRIDGING ADJACENT PADS.NOTE: WET/LIQUID PHOTO-IMAGEABLESOLDER RESIST/MASK IS RECOMMENDED.jFigure 3.0. PCBA — Adjacent Land Keep-out and Solder Mask. 元器件交易网www.cecb2b.com 15 2.0. Recommended SolderPaste/Cream Volume forCastellation Joints. The printed solder paste volumerequired per castellation pad is 0.36 cubic mm ±15% (based oneither on-clean or aqueous soldercream types with typically 60 to65% solid content by volume). 2.1. Recommended MetalSolder Stencil Aperture.To ensure adequate printedsolder paste volume, the following combination of metalstencil aperture and metal stencilthickness should be used: See Figure 4.0 t, nominal stencil thicknessmminches0.1270.1520.203 0.0050.0060.008 l, length of aperture mminches3.8 ± 0.13.4 ± 0.12.7 ± 0.1 0.150 ± 0.0040.134 ± 0.0040.106 ± 0.004 w, the width of aperture is fixed at 0.7 mm (0.028 inches) APERTURE AS PERLAND DIMENSIONSt (STENCIL THICKNESS)SOLDER PASTEMETAL STENCILwlFigure 4.0. Solder Paste Stencil/Aperture. 3.0. Pick and Place Misalignment Toleranceand Product Self-Alignmentafter Solder ReflowIf the printed solder paste volumeis adequate, the HSDL-2100will self align after solder reflow. Units should be properly reflowed in IR-Hot Air convectionoven using the recommendedreflow profile. The direction ofboard travel does not matter. Allowable Misalignment ToleranceX - DirectionTheta - Direction < = 0.2 mm (0.008 inches) ± 3 degrees 元器件交易网www.cecb2b.com www.hp.com/go/ir For technical assistance or the location ofyour nearest Hewlett-Packard sales office,distributor or representative call:Americas/Canada: 1-800-235-0312 or408-654-8675 Far East/Australasia: Call your local HPsales office. Japan: (81 3) 3335-8152 Europe: Call your local HP sales office.Data subject to change. Copyright © 1998 Hewlett-Packard Co.Obsoletes 5966-1639E (1/98)Printed in U.S.A. 5966-3834E (1/98) 因篇幅问题不能全部显示,请点此查看更多更全内容