LOGIC MODIFICATION SYNTHESIS

专利名称：LOGIC MODIFICATION SYNTHESIS发明人：Eli Arbel,David Geiger,Victor Kravets,Smita

Krishnaswamy,Ruchir Puri,Haoxing Ren

申请号：US12862838申请日：20100825

公开号：US20120054698A1公开日：20120301

专利附图：

摘要：A computer-executed method is disclosed which recognizes two circuits, anoriginal and a modified circuit, with the original circuit having a first logic and the modifiedcircuit having a second logic. The second logic is obtained by converting a modified

specification into a preliminary gate-level form. The second logic contains at least onedesired logic change relative to the first logic in order to realize the modifiedspecification. The method includes detecting an equivalence line in the original circuit,such that the first and second logic are equivalent from the circuit inputs to theequivalence line, and finding at least one point of change amongst the logic gates thatare neighboring the equivalence line. Next, accepting the points of change as verifiedpoint of change if an observability condition is fulfilled, which means that for every inputvector for which an output of the original and modified circuits differ, at least one logicvalue of the points of change propagate to that output of the original circuit. Thisobservability condition is checked within a Boolean Satisfiability (SAT) formulation. Themethod also includes deriving a substitute logic for the verified points of change, usingSAT techniques, and Boolean equation solving techniques which solve for a changefunction at each point of change, in such manner that the first logic in the original circuitbecomes equivalent to the second logic, and thereby implements the changedspecification.

申请人：Eli Arbel,David Geiger,Victor Kravets,Smita Krishnaswamy,Ruchir Puri,HaoxingRen

地址：Nesher IL,Peekskill NY US,New York NY US,New York NY US,Baldwin Place NYUS,Austin TX US

国籍：IL,US,US,US,US,US

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